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# Paper ID Title Abstract Congress Claim
1 101.Cnf-1160 Regulation control of the equivalence ratio in an experimental bubbling fluidized bed biomass gasification plant: design, application and test This paper describes the results of a regulation control of an experimental biomass BFB gasification plant. The aim of implementing the system is to improve the biomass gasification process to increase the efficiency and to ensure safety in the plant operation. The PLC is the heart of the system; it is used for applying the instructions to implement control functions, and to store data from the measurement devices. The equivalence ratio (ER) is one of the most important parameters in a gasification process. To improve the ER, the airflow input is controlled, measuring the air velocity through an anemometer. On the other hand, the biomass flow is controlled, modifying the velocity of the screw conveyor using an inverter for regulating the electric motor. Once implemented the automation and control system, the biomass gasification plant could work either; manually o automatically, letting to adjust the ER. The information acquired through the acquisition system has allowed improving the process. GMC-ElecEng 2020 Claim
2 102.Cnf-314 Clock Tree Optimization of FPGA Semi-Custom Memory with SEU FlipFlop Flip-flops (FFs) and memory (including Block RAM and Configuration RAM) are the key elements in Field Programmable Gate Array (FPGA). A single radiation event may cause bit flipping in the sequential elements. FPGAs are widely used in radiation environments such as space, the mitigation of single event upset (SEU) in SRAM based FPGAs is increasingly important. Generally, the SRAM macros implements well optimized in-built defect correction logic. For SEU tolerance, traditional FFs are replaced by SEU hardened FFs. This would lead to important performance penalties. It causes challenges to meet high frequency requirements of FPGA memories. Also, high-performance memory design implementation follows a hybrid of custom and digital design, using standard PNR (Place and Route) tools. FPGA applications demanding more features such as ability to form deeper memory, and the programmable word size etc. This leads to increase in the logic and wirelengths. This further introduces the higher delays in the design and impacts the performance. So, the optimal clock-distribution network in high density memory along with SEU tolerance feature, is one of the key aspects of high-speed SoC design. This paper demonstrates the methods to implement high quality clock tree to mitigate delay penalty introduced by the hardened FFs and higher wirelengths. Experimental results demonstrate that this approach also significantly improve the clock tree performance. GMC-ElecEng 2020 Claim
3 107.Cnf-113 Address Event Representation (AER) approach to resistive sensor arrays Address event representation (AER) has become an excellent strategy when approaching traditional frame-based applications, mainly vision sensors. In this paper, and Within this scope, the potential of the AER paradigm is demonstrated when considering resistive (non-vision) sensor arrays. For showing quantitative evidences, MOS AMS 0.35 um versions of some of the circuit cells typically used in AER systems, such as Winner-Take-All (WTA) circuits, have been implemented and analyzed. In these unit-cells, basic resistance-controlled sources are considered as per sensing devices. Preliminary simulation results demonstrate that this approach is valid for a wide range of resistive sensors. GMC-ElecEng 2020 Claim
4 102.Cnf-1158 Behaviour Shockley and Sakurai models in 7nm FinFet As we move towards the lower nodes the device dimensions are changing and becoming more complex. With FinFet the elevated channel, gate voltage applied from all 3 direction the gate electric field is no longer unidirectional. These add complexity in the behavior of current through the channel. Traditional Shockley model which had square law dependency on the over drive voltage in saturation region will no longer holds good. To overcome this shortcoming of the model alpha power model was introduced by Sakurai [1]. This accurately modeled the transistor behavior in submicron device in saturation region. According this model the device will not have square dependency in saturation but will have power reduce from 2 to 1 as node shrinks. As we were scaling the nodes, there wasn’t significant scaling in the voltage. As the velocity saturation becomes more dominant the alpha reaches 1. Models designed for the planar devices and are not in sync with the FinFet. Proposed paper describes the behavior of the MOS in 7nm across different voltage condition and comparison of the current behavior predicted from the Shockley’s square law model, Sakurai’s alpha power model in FinFet. GMC-ElecEng 2020 Claim
5 102.Cnf-1157 Performance Optimization of Semi-Custom Memory in 7nm FPGA Designing memories which embeds multiple features involves greater challenges. Adding additional features to memory degrades memory performance. Application demanding more features and high-performance memory, creates design challenges. Designing a feature rich memory using complete custom approach make the design turnaround time more. So, the memory implementation follows a hybrid of custom and digital design. Defining the optimal clock-distribution network in such feature rich designs is one of the most important aspect of high-speed SoC design. This paper demonstrates the custom approach by prioritizing the various features in terms of criticality of the timing requirements and significantly improve the clock tree performance. This approach opens new possibility for designing feature rich memory with high chances of first pass design on silicon. These kinds of memories can be seen in the FPGA’s, CPU’s, GPU’s. GMC-ElecEng 2020 Claim
6 102.Cnf-1096 Resistance Switching in Chalcogenides Memory Cell Ag/Ag-Ge-S structures Memeristive based memory is explored to be the future memory cell devices that can replace the identical MOS memory and to overcome the major problems of these memory devices. Nonvolatile (NV) memory cell can be fabricated depending on the phenomena of phase change memory (PCM) of chalcogenide materials. In this research an Ag-Ge-S/Ag structure memory cell was fabricated as a nonvolatile memory cell using vacuum thermal evaporation technique. The properties of these memory chalcogenides materials has been modified by controlling the evaporation parameters such as pressure, thickness and temperature or other external parameters, namely the applied voltage polarity. It is found the on state resistance of about 18 KΩ and an off state resistance of about 18.1011 Ω. The cell has very small write current of about (45 pA) which shows a great promise for using as extremely low power. GMC-ElecEng 2020 Claim
7 101.Cnf-1165 Design and inclusion of an electric propulsion system in a traditional boat in La Albufera This paper describes the methodology used to design and distribute an electric propulsion system in a traditional vessel in the Natural Park of “La Albufera”, located in Valencia (Spain). This system must satisfy the energy and power supply necessities. Furthermore, a previous study is carried out to identify and characterize the available spots inside the vessel. One of the main aims of that study is to minimize the overall impact in the operation customs of the boatmen and to provide a functional distribution. Finally, the conclusions are presented based on the economic feasibility study and the results of some energy indicators. GMC-ElecEng 2020 Claim
8 113.Cnf-1167 Model Predictive Control of DC-DC Buck-Boost Converter with Various Resistive Load Values Abstract__ Direct current (DC-DC) converters are the most popular devices for power supply circuits. The pulse width modulation has significant influences on their operations to manage their output power. Control theory is required to be applied to these converters to govern their inherent nonlinearity and non-minimum phase behaviors to maximize their efficiency and effectiveness. This research studies theory of a constrained Model Predictive Controller (MPC) applied to a DC-DC Buck-Boost converter with various values of a resistive load. The Quadratic Programming (QP) optimization algorithm subjected to unequal input constraint solved to predict the input control signal at every sampling time interval. This approach can be implemented at a faster time with robust and stability. MATLAB, Simulink, and the optimization process were used to achieve this goal. Keywords— DC-DC Buck-Boost converter, MPC, quadratic programming. GMC-ElecEng 2020 Claim
9 106.Cnf-90 Blind Source Separation Based on random mixing coefficient Blind source separation (BSS) is the extraction (estimation) of the original signals from mixed signals, without knowledge (or very little information) on the source signals or the mixture process. Many application is used blind source separation like cocktail parties and conferences. Therefore, source separation is considered a vital and important subject in signal processing. The separation problem is based on the mixing criteria, while the gap is for considering the sources is fixed. This paper introduces a random propagation mixing coefficient of an indirect path (moving sources) for Quasi of cocktail parties and press conference. The research also presents new evaluation criteria for the separation process and separation algorithms based on measuring the similarity of source and estimated signals. Where this evaluation criterion is based on signals features similarity. Three separation algorithm SVD, PCA, and ICA are tested with different noise amount with many source signals. The advancement of ICA as a good separation algorithm is clear with gaining a separation ration of 96.1%. GMC-ElecEng 2020 Claim
10 99.Cnf-313 Linear Time-Packing Detectors for Optical Feeder Link in High Throughput Satellite Systems This paper studies the performance of linear detectors when used to recover the information transmitted on a time-packed optical feeder link of a High Throughput Satellite (HTS) system. More precisely, a real-valued time-packed M-ary Pulse Amplitude Modulation (M-PAM) signal is used to modulate the intensity of the laser diode beam with an external Mach-Zehnder Modulator (MZM). At the receiver side, the signal samples are recovered with a photo-detector, and the sequence of payload bits to be encapsulated into the 5G radio frame can be optimally recovered with the aid of a Viterbi equalizer. However, as the modulation order of the M-PAM signal grows, as well as the overlapping factor of time-packing increases and/or the roll-off factor of the pulse-shaping filter decreases, the number of trellis states that are needed to recover the transmitted bit sequence successfully grows notably. To address this issue, this paper studies the performance of two low-complexity linear equalization strategies, namely truncated Minimum Mean Square Error (MMSE) and adaptive MMSE equalizers. As expected, though being sub-optimal, both linear detectors are able to mitigate the impact of the Inter-Symbol Interference (ISI) that time-packing introduces, enabling a better spectral efficiency when compared to baseline M-PAM transmissions without overlapping. GMC-ElecEng 2020 Claim
11 108.Cnf-1162 Enabling the natural gas system as smart infrastructure: Metering technologies for customer applications Natural gas systems, similarly to the rest of energy systems, are evolving towards a highly technified structure where high level of metering devices, monitoring and communication activities, are calling to play the starring role. EU countries started the replacement of the traditional gas meters with smart devices in 2012, but the massive rollout is still on going. This paper presents a review on the smart meter devices for the natural gas sector that are available in the market. An overview on the existing smart technologies and their peculiarities will be presented and sensor technical characteristics will be highlighted. Furthermore, the needs of these new technologies and the natural gas communication infrastructure will be explored. On the other side, existing barriers that prevent their suitable deployment of such devices will be analyzed. Finally, their potential evolution and future application will be briefly outlined. GMC-ElecEng 2020 Claim
12 101.Cnf-1159 Kalman Filter for Reducing Total Harmonics Distortion in Stand-alone PV System The use of photovoltaic (PV) systems has increased steadily in the last few years due to the high demands on clean energy in different daily usages. However, the delivered power is still unstable most of the time due to the constant changes in the weather conditions. The fluctuation in the solar irradiance creates harmonics in the generated power that might leads to undesirable performance of PV system. Total harmonic distortion (THD) is the most common way that has been used as an indication of how much distortion the signal has. In order to reduce THD in the output power signal from PV systems, different techniques such as maximum power point tracking (MPPT) and power electronics connection topologies such as multi-level inverter (MLI) and control strategies such as variable duty cycle pulse width modulator (PWM) have been used. Despite all the progress that has been, the output signal still suffers from THD. This paper presented a new method of THD in PV system using Kalman filters. The distorted output current signal from a single-phase stand-alone PV system was processed by Kalman filter before it is delivered to the load. The obtained results showed that Kalman filter is very effective in term of THD reduction. It reduces the accumulated THD from 19.8% up to 3% based on the value of the covariance matrices of the process and measurement noise (tuning variable). GMC-ElecEng 2020 Claim
13 107.Cnf-220 Implementing Low Cost and Secure Data Transmission Layer for Image Transmission in Wireless Sensor Network Wireless Sensor Networks continuously send information collected from the environment to the other node and then to the server or main collector. As the network structure grows, the size of the data transfer within the network also increases dramatically. If the network transmits image, the data in traffic also increases. In this study, a low-cost transmission protocol (interlayer) was created for picture transmission in Wireless Sensor Networks. The protocol used uses the pixels that make up the picture. Lena's 512x512 pixel gray level image was used in the study. The original size is 256 KB, the size of the picture is reduced to 192 KB and a 25% advantage is provided. And the structural similarity ratio (SSIM) of PSNR of 51,1365 and 0,9976 was reached. The data is encrypted using the AES encryption algorithm before being transferred. Thus, a safer transmission layer was created. As a result of the study, according to the information obtained without changing the picture 12.5% and 25% of data transfer to create a transfer layer has been created and data transmission in the Wireless Sensor Networks data transmission is reduced. GMC-ElecEng 2020 Claim
14 113.Cnf-1155 Implementation of an Optical Sensor to Detect Fishes in Aquiculture Tanks The increase in the world population increments the demand for fish. In this context, the fish farms have to improve the production in their infrastructures being this very expensive. In this paper, we propose a Low-Cost Wireless Sensor Network based in an optical sensor, for monitoring the presence of sea breams at different distances. In addition, we use a test tube with foil to simulate the similar characteristics of this kind of fishes to perform the tests. We evaluate the use of a light-dependent resistor and a photodiode for the infrared spectrum to detect the object at different distances. Our results indicate that the best is the photoresistor because its data was more accurate than the photodiode. In the experiment, we locate the simulation of fish at different distances of 5 cm, 9 cm, 10 cm, 15 cm, 17 cm, 26 cm, and 37 cm. We measure at different points of the tank measuring the data triplicate. The results displayed that the maximum resistance is 15.44Ω when the test tube is located near the photoresistor and the minimum 10.39Ω when the tube is located far away from the photoresistor. Finally, we perform a test using a real fish that we thought in front of the photoresistor. The results show that when fish is in front of the photoresistor, the maximum resistance is 15.45Ω (with fish) and minimum resistance of 6.42Ω (without fish). We concluded that we are able to distinguish the presence of fish at different distances using light demand resistors. GMC-ElecEng 2020 Claim
15 107.Cnf-354 Compact modeling of reaction-diffusion-advection mechanisms for the virtual prototyping of lab-on-chip The topic of this paper is the development of compact models reaction-advection-diffusion phenomenon. From a mathematical perspective, biological systems that involve such phenomena are described by partial differential equations. Our approach consists in discretizing these equations according to the finite-difference method and converting the resulting ordinary differential equations into an assembly of elementary equivalent electronic circuits that are simulated with SPICE. The main interest of this approach is the ability to couple such models with third-party SPICE models of electronic circuits, sensors and transducers as well as biochemical models that can also be written in SPICE. The tool is validated on simple problems for which analytical solutions are known. Then, our simulator is compared to a reference finite element simulator: COMSOL Multiphysics. GMC-ElecEng 2020 Claim