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  • 18.Cnf-39
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CNIT Conferences with Published Papers

MIC-CNIT 2009, Amman
2 Papers

MIC-CNIT 2010, Amman
7 Papers
Papers Published at MIC-CNIT 2010
All 7 Papers
IDAuthors and TitlePages
18.Cnf-10 Mr. Muamer Mohammed, Dr. Norrozila Sulaiman and Mr. Osama A. Muhsin, A Novel Intrusion Detection System by Using Intelligent Data Mining in Weka Environment1-4
18.Cnf-15 Prof. Khireddine Abdelkrim, Mr. Djamel Derardja and Mr. J. Salvestrini, Artificial Intelligence Applied for a Telecommunication Satellite5-9
18.Cnf-22 Mr. Jiri Libich and Prof. Stanislav Zvanovec, Thermal Influences of Buildings on Availability of Free Space Optical Links10-13
18.Cnf-24 Mr. Saifur R. Sabuj and Mr. Md S. Islam, Suppression of Intercarrier Interference Using Self-Cancellation Data Conjugate Scheme in MIMO-OFDM System14-18
18.Cnf-25 Mr. Saifur R. Sabuj, Mr. Zulfiker Mahmud and Mr. M. E. Mollah, Suppression ICI Self-Cancellation Technique in OFDM using ADS 19-22
18.Cnf-26 Mr. Majid Naghmash, Prof. Mohd F. Ain and Mr. Yin H. Chye, Low-Power Decimation Filter Design for SDR Receiver Applications23-27
18.Cnf-39 Dr. Cinzia Bernardeschi, Dr. Luca Cassano, Dr. Andrea Domenici and Dr. Paolo Masci, Analysis of FPGAs Using the SAN Formalism28-33
18.Cnf-39 Paper View Page
Title Analysis of FPGAs Using the SAN Formalism
Authors Dr. Cinzia Bernardeschi, University of Pisa, Pisa, Italy
Dr. Luca Cassano, University of Pisa, Pisa, Italy
Dr. Andrea Domenici, University of Pisa, Pisa, Italy
Dr. Paolo Masci, University of Pisa, Pisa, Italy
Abstract We describe a model of FPGA based systems realised with the Stochastic Activity Networks (SAN) formalism. The model can be used (i) to debug the FPGA circuit design synthesised from the high level description of the system, and (ii) to calculate the signal probabilities and transition densities of the FPGA circuit design, which are parameters that can be used for reliability analysis, power consumption estimation and pseudo random testing of digital circuit design. We validate the developed model by reproducing the results presented in other studies for some representative combinatorial circuits, and we explore the applicability of the proposed model in the analysis of real-world devices by analysing the actual implementation of a circuit for the generation of Cyclic Redundancy Check codes.
Track DCS: Digital Communication Systems
Conference 4th International Conference on Communications, Networking and Information Technology (MIC-CNIT 2010), 3-5 December 2010, Amman, Jordan
Pages 28-33
Topics Communication System Simulation
Signal Processing for Communications
ISSN 2227-331X
Paper Views 140 Paper Views Rank 47/452
Paper Downloads 109 Paper Downloads Rank 42/452
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