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Update on Saturday, 22 August 2020: Paper 19.Cnf-57@MIC-CPE 2011 reaches 560 views.
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Summary Information of Mr. Santosh Yachareni
Name Mr. Santosh Yachareni
Affiliation Xilinx India,
Topics Digital Circuit Design
Circuits, Devices and Subsystems
Biography Title: Distinguished Engineer/Sr. Director Design Engineering, Xilinx, Hyderabad, India. More than 20 Years of circuit design experience, with 31 US Patents, 2 trade secrets, and 3 publications [2 in IEEE Conferences] End to end experience in designing SRAMs, Band-gaps, LDO Regulators, High Voltage Charge Pumps, Power-on-Resets, FPGA Fabric Design and more Experience in 7nm, 16nm, 20nm, 28nm, 40nm Designs; including product definition, design, silicon validation. 31 US Patents in the field of high-speed SRAMs, Power-on-Resets, Analog Designs, and Flash Memory designs from three different companies. 10 More Patents pending at USPTO. 2 trade secrets at Xilinx.
User Since Friday, 17 July 2020
User Page Views 108
User Contribution Index (UCI) 0.2026
Published Papers of Mr. Santosh Yachareni
Paper IDPaper TitleConferenceDates and Location
29.Cnf-1157Mr. Sourabh Aditya Swarnkar
Mr. Mohammad Anees
Mr. Kumar Rahul
Mr. Santosh Yachareni
Performance Optimization of Semi-Custom Memory in 7nm FPGA
MIC-ElectricApps 20204-6 September 2020 (Remotely) in Valencia, Spain
Conference Chairings of Mr. Santosh Yachareni
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